1. Field of the Invention
The present invention is generally directed to memory, and more particularly to on chip sensing of a SONOS VT window in a non-volatile Static Random Access Memory (nvSRAM).
2. The Relevant Technology
Semiconductor memory devices are widely used in the computer and electronics industries as a means for retaining digital information. A typical semiconductor memory device is comprised of a large number of memory elements, known as memory cells, that are each capable of storing a single digital bit. The memory cells are arranged into a plurality of separately addressable memory locations, each being capable of storing a predetermined number of digital data bits. All of the memory cells in the device are generally located upon a single semiconductor chip which is contacted and packaged for easy insertion into a computer system.
Margin mode testing, where a threshold voltage range is measured for silicon oxide nitride oxide semiconductor (SONOS) transistors in a nonvolatile memory portion by performing a series of recall operations using varying bias levels, is currently used to determine the store/erase voltage, VSE, for a RECALL operation on a non-volatile Static Random Access Memory (nvSRAM) cell. A margin mode process begins by storing data into the non-volatile SRAM cell. Then, the opposite data is then written into the Static Random Access Memory (SRAM ) cell. VSE is set to a static value of 0V. The stored data is then recalled and the entire contents of the SRAM is read to check if the recall operation was successful. Typically, once the threshold voltage range is determined and VSE is set, it is not altered. If a VSE for a RECALL operation is chosen based on the VT window, it may be that the VSE falls outside of that range due to degradation of the program and erase threshold voltages of the SONOS transistors.
It would therefore be advantageous to provide a method and apparatus for determining the threshold voltage range for the SONOS transistors without having to perform an endless number of tests that are both time consuming and unable to adapt to the degradation of threshold voltages.